The present disclosure relates to semiconductor devices, and in particular, to variable resistance memory devices.
In order to meet an increasing demand for semiconductor memory devices with high performance and low power consumption properties, various next-generation semiconductor memory devices (e.g., ferroelectric random access memory (FRAM), magnetic RAM (MRAM), phase-change RAM (PRAM), resistive RAM (RRAM), and so forth) are being developed. Next-generation semiconductor memory devices may include, as a memory element, a material or structure having a resistance (“electrical resistance”) that may be changed by a current or voltage applied thereto and can be maintained even when a current or voltage supply is interrupted.
In particular, MRAM devices can provide technical advantages, such as low latency and/or non-volatility, and thus, they are emerging as next-generation semiconductor memory devices. MRAM devices may include a magnetic tunnel junction (MTJ) pattern. The MTJ pattern includes two magnetic layers and an insulating layer interposed therebetween. Resistance of the MTJ pattern varies depending on magnetization directions of the magnetic layers. For example, the resistance of the MTJ pattern is greater when the magnetic layers have anti-parallel magnetization directions than when they have parallel magnetization directions. Such a difference in resistance can be used for a data-storing operation in the MRAM device.